Generally, an interconnect structure is constructed by an interconnect horizontally elongated on a substrate, and a contact structure that connects an active region or a lower conductive layer of the substrate, which is the final destination of electrical signals, to the interconnect in a vertical direction. As used herein, the term contact structure refers to a contact plug, a contact pad, etc., and a metal contact structure refers to a contact structure that includes, at least partially, a metal.
A phase-change memory refers to a device that uses a phase-change layer, typically composed of chalcogenide, with an electrical resistance varied in accordance with a crystalline state for a memory cell. Phase-change memories are currently of interest because of non-volatilization, low power dissipation, high reliability, high device integration, etc. Phase-change memories typically use the Joule heating resulting from a current as a heat source for changing the phase of a portion of the phase-change material. FIG. 1 shows a conventional phase-change memory cell array structure.
Referring to FIG. 1, a memory cell has a single transistor CTR with a word line WL connected to a gate of the single transistor CTR, and a phase-change cell PCC serially connected with a resistor R between a drain of the cell transistor CTR and a bit line BL. When a word line WL and a bit line BL are selected, a current is applied to a selected phase-change cell PCC to change a crystalline structure of the phase-change cell PCC.
When actually driving the phase-change memory, a high current pulse of about 2 mA is applied from a transistor disposed under the phase-change layer to the phase-change layer for about 50 ns via the contact structure (including a metal contact plug, a metal pad and a lower electrode contact), thereby heating a portion of the phase-change material to a melting point Tm. Then, when application of the pulse is stopped, the phase change material rapidly cools and a contact portion of a phase-change layer is set to an amorphous state, which provides a high resistance. This state is referred to as reset, which is defined as storing data “1,” for example. Under this condition, a current pulse of about 0.1 mA is applied from the transistor under the phase-change layer to the phase-change layer via the contact structure, and the phase-change layer is cooled after maintaining a crystallization temperature for from hundreds of nanoseconds to several microseconds. Then, the contact portion of a phase-change layer that was set to an amorphous state (e.g, the programming area) is restored to a crystalline state with a low resistance. This state is referred to as set, which is defined as storing data “0,” for example. When reading out the stored data, a current lower than a reset current Ireset and a set current Iset is applied to confirm the change of the resistance.
Generally, the metal contact structure of the semiconductor device is formed by sputtering using aluminum (Al). However, a metal contact hole typically has a gradually decreased dimension resulting as a result of attaining high integration of the semiconductor device, which in turn impedes the step coverage of the aluminum contact. To solve this problem, forming a tungsten contact with a high contact resistant characteristic is used. Tungsten (W) is a heat-resistant metal with a high melting point, which has an excellent thermal stability with respect to silicon and a low resistivity of about 5˜10/μΩcm.
However, increased packing density of semiconductor devices may gradually decrease line width of interconnects, and increase the aspect ratio of the contact hole. Accordingly, problems may occur when forming the metal contact structure composed of tungsten. For example, contact resistance may be increased due to the decreased contact area, and a void or a seam may be produced when depositing a metal in a narrow and deep contact hole which may increase the contact resistance or degrade reliability of the contact.
The metal contact structure having the void or the seam as described above may be particularly problematic in a phase-change memory. In a phase-change memory, a phase-change layer is typically disposed on a contact structure that typically includes a metal contact plug, a metal pad, and a lower electrode contact, in which respective contacts should be ohmic contacts having little or no resistance error. However, if the void or seam is formed in the lower electrode contact, the phase-change layer may fill the void or seam. In this case, the contact area with the phase-change layer and the lower electrode contact is increased, thereby degrading an operating characteristic of the phase-change memory cell. If the seam is involved in the metal contact plug or metal pad, the seam is further enlarged by CMP, subsequent etching and wet cleaning. In particular, when the seam is formed in the metal pad, the lower electrode contact becomes directly in contact with an upper surface of the seam while the lower electrode contact is formed in the center of an upper surface of the metal pad, thereby causing a resistance error which may degrade yield.
A method is suggested in order to address the generation of the seam in the metal contact structure. In such a method, an entrance of a contact hole is enlarged using Ar sputtering (RF cleaning) after etching the contact hole for burying the metal contact structure therein. Thus, a position of the seam may be reliably produced when tungsten is filled in the contact hole in a subsequent process is moved to an upper portion of the contact plug to reduce frequency of the seam generation. Furthermore, an off-axis lower electrode contact structure is suggested. In such a structure, even though a seam is formed in a metal pad, the position of forming the lower electrode contact on the metal pad is changed from the center to the side not to contact the seam. However, several processing steps are added to further complicate the overall process.